发明名称 Digital radio system capable of high-speed frequency changing at low power consumption
摘要 The output frequency of a PLL frequency synthesizer and the output frequency of a fixed oscillator are mixed together in a mixer to produce sum and difference frequencies. The sum frequency is used as a local frequency, and the difference frequency is fed back to the PLL frequency synthesizer. In addition, the output frequency of the fixed oscillator is divided in a predetermined ratio to use it as a local frequency for the second or other subsequent frequency converting stage on the receiver or transmitter side.
申请公布号 US5603097(A) 申请公布日期 1997.02.11
申请号 US19950517196 申请日期 1995.08.21
申请人 KYOCERA CORPORATION 发明人 KANOU, HIDETO
分类号 H04B1/26;H03D7/16;H03J5/02;H03L7/185;H04B1/40;H04L27/18;(IPC1-7):H04B1/50 主分类号 H04B1/26
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