发明名称 |
Electrically erasable and programmable non-volatile and multi-level memory systemn with write-verify controller |
摘要 |
An EEPROM for storing multi-level data includes a memory cell array in which electrically erasable and programmable memory cells are arranged in matrix and each of the memory cells has at least three storage states, a write circuit for writing data to the memory cells, first and second write verify means each constituted of a sense amplifier, a data latch circuit and a detection circuit, for verifying an insufficient-written state of a memory cell and an excess-written state of a memory cell, respectively, an additional write circuit for additionally writing data to the memory cell in the insufficient-written state, and an additional erase circuit for additionally erasing data from the memory cell in the excess-written state.
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申请公布号 |
US5602789(A) |
申请公布日期 |
1997.02.11 |
申请号 |
US19950518024 |
申请日期 |
1995.08.22 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
ENDOH, TETSUO;SHIROTA, RIICHIRO;OHUCHI, KAZUNORI;KIRISAWA, RYOUHEI;ARITOME, SEIICHI;TANAKA, TOMOHARU;TANAKA, YOSHIYUKI |
分类号 |
G11C11/56;G11C16/34;G11C29/50;(IPC1-7):G01R31/28 |
主分类号 |
G11C11/56 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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