发明名称 ADDRESS GENERATING CIRCUIT FOR ATM SWITCH
摘要 <p>PROBLEM TO BE SOLVED: To realize the address generating circuit for a common butter type ATM switch adopting the address management system by which port information subjected to time division multiplex in each incoming link is exchanged to each outgoing link in time division multiplex. SOLUTION: The address generating circuit for common buffer type ATM switches in the ATM(asynchronous transfer mode) exchange system is provided with an address generating unit 4 storing cell addresses in each common butter, port information and output link information in time series, port pointer registers 8a, 8b storing information representing a current output port for each output link, and a port list table 9 storing information of ports housed in each output link.</p>
申请公布号 JPH0936868(A) 申请公布日期 1997.02.07
申请号 JP19950180148 申请日期 1995.07.17
申请人 TOSHIBA CORP 发明人 UNEKAWA YASUO
分类号 H04Q3/00;H04L12/741;H04L12/879;H04L12/931;H04L12/933;(IPC1-7):H04L12/28 主分类号 H04Q3/00
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