SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS MANUFACTURE

摘要

PROBLEM TO BE SOLVED: To improve the withstand voltage at the junction of the control gate of a semiconductor integrated circuit device having an EEPROM constituted in a one-layer gate structure. SOLUTION: In the memory cell 2A of an EEPROM having a semiconductor area 2ACG for control gate CG formed on a semiconductor substrate 3 and a floating gate FG which is arranged in the area 2ACG and provided at part of the gate electrode section 2AFG1 of a MOS transistor Q, the semiconductor area 2ACG of the control gate CG is arranged on the inside of the inner periphery of a field insulating film.