| 摘要 |
PROBLEM TO BE SOLVED: To improve the stability of a phase control loop while shortening the lock-in time with no limitation on the operational range. SOLUTION: The inventive circuit comprises a PLL circuit 20 for generating a clock based on an input data, a data discriminator circuit 22 for latching the input data with the clock, and a CRC detection means 43 for detecting the lock-in state of PLL based on the latched output. The PLL comprises a VCO 24, a phase comparator 25 for comparing the phases of an oscillation output and an input signal, a limiter circuit 26 provided at the output stage of phase comparator, and a feedback loop for controlling the limiter level. The limiter circuit 26 is operated as a tracking limiter through the feedback loop at the time of lock-in and operated as a locked limiter by opening the feedback loop at the time of lock-out. |
