| 摘要 |
An N-type source (or drain) region is formed in the surface area of a P-type silicon substrate. A first insulation film is formed on the silicon substrate and a gate electrode is formed on the first insulation film. A second insulation film is formed on the first insulation film and gate electrode. A through hole is formed in those portions of the second insulation film, gate electrode and first insulation film which lie on the source region. A gate oxide film is formed on the side wall of the through hole. A P-type silicon layer serving as a channel region is formed on that portion of the source region which lies inside the through hole by the selective epitaxial growth. An N-type drain (or source) region is formed in the upper portion of the silicon layer. A third insulation film is formed on the resultant structure. A first contact hole is formed in portions of the third, second and first insulation films which lie on the source region, a second contact hole is formed in portions of the third and second insulation films which lie on the gate electrode, and a third contact hole is formed in a portion of the third insulation film which lies on the drain region by use of the RIE method. Wiring layers are formed inside the first to third contact holes and on part of the third insulation film.
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