发明名称 FAULT TOLERANT INTERCONNECTION NETWORKS
摘要 A multi-stage, alternate routing switching network is enhanced with a switch architecture that is able to detect and mask all single faults. The switch employs a controller that develops dual rail control signals. In one embodiment, the controller is made up of two controllers that receive the same inputs but generate complementary outputs. The complementary outputs form the dual rail signals that control the multiplexers that are interposed between the inputs and the outputs of the switch. The dual rail control of the signal routing within the switch allow foreffective detection of all single faults in the signal routing means. Inclusion of totally self checking circuits at the switch outputs as well as inputs enables users to readily isolate a fault and identify its source.
申请公布号 CA2029053(C) 申请公布日期 1997.02.04
申请号 CA19902029053 申请日期 1990.10.31
申请人 AMERICAN TELEPHONE AND TELEGRAPH COMPANY 发明人 BRUNNER, BEAT;KUMAR, VIJAY P.
分类号 H04Q1/24;H04L12/56;H04Q3/52;H04Q3/68;(IPC1-7):H04Q3/42 主分类号 H04Q1/24
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