| 发明名称 |
Method for production of semiconductor integrated circuit device provided with a high voltage transistor |
| 摘要 |
<p>A method for the production of a semiconductor integrated circuit device is disclosed, wherein the formation of lateral wall spacers for high voltage MOS transistor is implemented by forming a resist film (10) for covering at least an insulating film (9) formed on a drain region (6) of low impurity concentration in the proximity of a gate electrode (5A), masking the resist film (10), and etching the parts of the insulating film destined to give rise to the lateral wall spacers (12). <IMAGE></p> |
| 申请公布号 |
EP0757391(A2) |
申请公布日期 |
1997.02.05 |
| 申请号 |
EP19960112365 |
申请日期 |
1996.07.31 |
| 申请人 |
SANYO ELECTRIC CO. LTD |
发明人 |
AOYAMA, MASASHIGE;YOSHITAKE, KAZUHIRO |
| 分类号 |
H01L21/302;H01L21/3065;H01L21/336;H01L21/8238;H01L27/092;H01L29/78;(IPC1-7):H01L29/78 |
主分类号 |
H01L21/302 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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