发明名称 Array with metal scan lines controlling semiconductor gate lines
摘要 Array circuitry formed at the surface of a substrate includes M scan lines that cross N data lines. The array circuitry also includes cell circuitry connected to the mth scan line and the nth data line. The cell circuitry includes a component with a data lead for receiving signals from or providing signals to the nth data line. The cell circuitry also includes connecting circuitry with first and second semiconductor lines. The first semiconductor line has a channel between the nth data line and the data lead of the component. The second semiconductor line is connected to the mth scan line and crosses the first semiconductor line at the channel. Because the second semiconductor line is conductive, signals on the mth scan line control conductivity of the channel. The semiconductor lines can be polysilicon, and the scan lines can be aluminum. The component can include a capacitive element with one electrode under the (m+1)th scan line, part of which forms the other electrode of the capacitor. The channel can be under the nth data line, leaving the cell area free. The component can also include a light transmissive cell electrode in the cell area, and the array circuitry can be used in a display, with liquid crystal material positioned along the cell electrode. The display can also include peripheral circuitry outside the boundary of the array circuitry, connected to the scan lines and data lines.
申请公布号 US5600155(A) 申请公布日期 1997.02.04
申请号 US19950572357 申请日期 1995.12.14
申请人 XEROX CORPORATION 发明人 WU, I-WEI
分类号 G02F1/136;G02F1/1368;H01L23/482;H01L23/532;H01L23/538;(IPC1-7):H01L29/04;G02F1/134 主分类号 G02F1/136
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