Programmierbarer integrierter Speicher mit Emulationseinrichtung

摘要

The programmable memory has a matrix (1) of addressable memory cells with circuits (4,6,9,14) for supplying voltages for programming and erasing of each cell as a required by signals on internal control lines (C). A comparator (10) compares the data write and read. External address and data lines are connected to the corresponding internal lines by an interfacing circuit (18). The exchange of data is regulated by a user control unit (3) receiving external command signals (CD). A logical state machine (2) executes algorithms as directed by the user control (3).