摘要 |
<p>The memory cell structure has a cell field formed in the surface of a semiconductor substrate (12, each cell having at least one selection transistor and a memory capacitor, contained in an etched channel. The electrode structure (21) of the memory capacitor contains at least 2 electrically coupled elements (15,17,20) at a given relative spacing, with a storage dielectric (22) and a counter-electrode (23) at the surface of the electrode structure.</p> |
申请人 |
SIEMENS AG, 80333 MUENCHEN, DE |
发明人 |
WIDMANN, DIETRICH, DR.-ING., 82008 UNTERHACHING, DE;WENDT, HERMANN, DIPL.-PHYS. DR., 85630 GRASBRUNN, DE;HOENLEIN, WOLFGANG, DIPL.-PHYS. DR., 82008 UNTERHACHING, DE |