发明名称 |
Apparatus and method for performing both 24 bit and 16 bit arithmetic |
摘要 |
A data ALU (arithmetic logic unit) (54) in a data processing system (20) performs both 24-bit arithmetic, and 16-bit exact arithmetic (including shifting and logical operations) using the same hardware. For a multiply/accumulate operation in 16-bit exact mode, shifting operations are used to align the operands so that 16-bit exact mode is transparent to a user. An entire instruction set can be executed in 24-bit mode or 16-bit exact mode. The same instructions and hardware are used in both modes. A transition between modes is performed by changing a status bit (97) in a status register (95).
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申请公布号 |
US5598362(A) |
申请公布日期 |
1997.01.28 |
申请号 |
US19940361406 |
申请日期 |
1994.12.22 |
申请人 |
MOTOROLA INC. |
发明人 |
ADELMAN, JUDAH L.;MARINO, PAUL;GOREN, AVNER;HILLMAN, GARTH |
分类号 |
G06F7/00;G06F5/00;G06F7/57;G06F9/302;G06F9/315;G06F9/32;(IPC1-7):G06F7/38 |
主分类号 |
G06F7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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