发明名称 Real-time in-line defect disposition and yield forecasting system
摘要 A real-time in-line defect disposition and yield forecasting system for a semiconductor wafer having layer containing devices includes an in-line fabrication inspection tool, a design review station, and a yield management station. The in-line fabrication inspection tool inspects at least two layers of the semiconductor wafer and produces first information including particle size, particle location and number of particles introduced therein for each of these layers. The design review station inspects the layers of the semiconductor wafer and produces second information including layouts of each of the layers. The yield management station is operatively connected to the in-line fabrication inspection tool and to the design review station. The yield management station retrieves the first information and the second information from the in-line fabrication inspection tool and from the design review station. The yield management station determines at least one of a number of killer defects for the devices in each of the layers or a defect sensitive area index for each of the layers using the first and second information. The yield management station also determines a priority for analyzing each of the at least two layers responsive to at least one of the number of killer defects and the defect sensitive area index for each of the layers.
申请公布号 US5598341(A) 申请公布日期 1997.01.28
申请号 US19950401490 申请日期 1995.03.10
申请人 ADVANCED MICRO DEVICES, INC. 发明人 LING, ZHI-MIN;VO, THAO;HO, SIU-MAY;SHIAU, YING;PENG, YENG-KAUNG;LIN, YUNG-TAO
分类号 G01N21/95;G03F7/20;H01L21/00;H01L21/66;(IPC1-7):G06F19/00 主分类号 G01N21/95
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