发明名称 Integrated circuit device, e.g. chip scale package
摘要 The device includes an integrated circuit chip (102) with several input/output connections (104) on a main surface (108). An anisotropic electrically conductive layer (106) is deposited on this main chip surface, the layer being conductive in the same angle of intersection as that possessed by the surface layer and being non-conductive in other directions. The anisotropic layer is provided between a dielectric substrate (122) and the IC chip. Provided on the dielectric substrate are several electrical pads (110) which are arranged with the anisotropic layer. These pads are connected to the input/output connections in one direction while being insulated from them in another.
申请公布号 DE19628376(A1) 申请公布日期 1997.01.23
申请号 DE19961028376 申请日期 1996.07.13
申请人 NATIONAL SEMICONDUCTOR CORP., SANTA CLARA, CALIF., US 发明人 CHILLARA, SATYA, SAN JOSE, CALIF., US
分类号 H01L21/60;H01L23/367;H01L23/42;H01L23/498;(IPC1-7):H01L23/50;H01L21/48;H05K1/18;H05K3/32 主分类号 H01L21/60
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