摘要 |
PURPOSE:To prevent an erroneous sub clock signal from being reproduced, by inserting a register of eight bits and a protection circuit for detecting bipolar violation into a circuit which receives and reproduces the sub clock signal of 8KHz from a composite bipolar signal. CONSTITUTION:When a composite bipolar clock signal is received with correct regularity, a coincidence decision signal can be obtained correctly at every eight bits in a coincidence decision circuit 3, and the frequency demultiplying state of a 1/8 frequency demultiplier 4 is controlled correctly, therefore, the sub clock signal of 8kHz that is 1/8 of a clock of 64kHz can be received and reproduced correctly. When a bipolar rule is received erroneously due to an unknown cause, it is not detected at a bipolar violation detection circuit 1. As a result, since no coincidence output is generated from the coincidence deci sion circuit 3, a normal frequency demultiplying operation can be continued without resetting the 1/8 frequency demultiplier 4. |