发明名称 Method for fabricating a multiple well structure for providing multiple substrate bias for DRAM device formed therein
摘要 A dynamic random access memory device (10) includes three separate sections-an input/output section (12), a peripheral transistor section (14), and a memory array section (16), all formed on a p- type substrate layer (18). The dynamic random access memory device (10) can employ separate substrate bias voltages for each section. The input/output section (12) has a p- type region (22) that is isolated from the p- type substrate layer (18) by an n-type well region (20). The peripheral transistor section (14) has a p- type region (36) that can be isolated from the p- type substrate layer (18) by an optional n- type well region (40) for those devices which require a different substrate bias voltage between the peripheral transistor section (14) and the memory array section (16).
申请公布号 US5595925(A) 申请公布日期 1997.01.21
申请号 US19940236745 申请日期 1994.04.29
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 CHEN, IH-CHIN;SHICHIJO, HISASHI;TENG, CLARENCE W.
分类号 H01L21/8238;H01L21/8226;H01L21/8242;H01L27/082;H01L27/092;H01L27/105;H01L27/108;(IPC1-7):H01L21/70;H01L27/00 主分类号 H01L21/8238
代理机构 代理人
主权项
地址