发明名称 |
Semiconductor memory device having dual word line configuration |
摘要 |
In a semiconductor memory device including: a plurality of sub word lines, a plurality of sub word decoders each connected to one of the sub word lines, a plurality of pairs of main word lines each pair connected to a number of the sub word decoders, and a plurality of main word decoders each connected to one of the pairs of main word lines, each of the main word decoders sets voltages at a respective pair of the pairs of main word lines different from each other in a selection mode and sets the voltages at a respective pair of the pairs of main word lines the same as each other in a non-selection mode.
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申请公布号 |
US5596542(A) |
申请公布日期 |
1997.01.21 |
申请号 |
US19950536189 |
申请日期 |
1995.09.29 |
申请人 |
NEC CORPORATION |
发明人 |
SUGIBAYASHI, TADAHIKO;UTSUGI, SATOSHI;NARITAKE, ISAO |
分类号 |
H01L21/66;G11C8/10;G11C8/12;G11C8/14;G11C11/401;G11C11/407;G11C11/408;G11C11/413;G11C29/00;G11C29/04;H01L21/82;H01L21/8242;H01L27/108;(IPC1-7):G11C8/00 |
主分类号 |
H01L21/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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