| 摘要 |
PURPOSE: To provide the comparator which performs the differential operation at a high speed with low power consumption even under a low supply voltage. CONSTITUTION: A difference voltageΔVa (ΔVb) between an input voltage V1 (V2) and a reference voltage V1r (Vr2) is generated with a bias voltage Vb1 as the reference voltage by switches SW1a (SW1b) and SW2a (SW2b), a capacity C1a (C1b), and a switch SW3a (SW3b), and one end of a capacity C2a (C2b) is reset to a bias voltage Vb2 by a switch SW5a (SW5b), and a pulse voltage Vstep is applied to the other end of the capacity C2a (C2b) after the voltageΔVa (ΔVb) is added to the potential in one end of the capacity C2a (C2b) by a switch SW4a (SW4b), and the potential in one end or the capacity C2a (C2b) has the level shifted to the operation point of a transistor T1a (T1b), and amplified voltage differences are generated between outputs of transistors T1a and T1b during and after the level shift based on the pulse voltage Vstep in accordance with relations between difference voltagesΔVa andΔVb, and these outputs are inputted to a differential latch DLAT to obtain a digital value according with the comparison result.
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