| 摘要 |
PROBLEM TO BE SOLVED: To mount a large-capacity memory circuit, without increasing the chip area by forming a first and second RMOS transistors having a common source region and first and second PMOS transistors having a common source or drain region. SOLUTION: On wells 101 of a low-concn. p-type impurity diffused layer are formed n-channel type MOS transistor forming regions 102 of a high-concn. n-type impurity diffused layer, and formed N-MOSs 106, 108, 110, 112 with data electrodes 103 and sub-N-MOSs 107, 109, 111 with gate electrodes 104 having a narrower channel width than that of the electrode 103. Similarly, P-MOSs 117, 110, 121, 123 and sub-P-MOSs 118, 120, 122 are formed. Thereby, a large-capacity memory circuit can be mounted, without increasing the chip area, the power consumption can be suppressed and data can be surely written and held in memory cells. |
