| 摘要 |
<p>PURPOSE: To prolong the service life by making a memory cell transistor and a dummy cell deteriorate similarly. CONSTITUTION: A control circuit 9 generating a write control signal MPE, an erase control signal MEE, a read control signal MRE for memory cell transistor, an erase control signal DEE, a read control signal DRE for dummy cell in synchronism with a write control signal PE, an erase control signal EE, and a read control signal RE and a write control signal DPE for one dummy cell immediately after one erase control signal EE, is provided. In accordance with the MPE, MEE and MRE, a various type voltage generation circuit 7a generates various types of voltages for respective operations which are transmitted to a row decoder 2, a column decoder 3 and bit line selection circuit 5. In accordance with the DPE, DEE and DRE, a various type voltage generation circuit 7b generates various types of voltages for respective operations which are transmitted to a reference voltage generation circuit 6.</p> |
