发明名称 |
High speed memory access system for a microcontroller with directly driven low order address bits |
摘要 |
A microcontroller which directly drives a memory with low order address bits during a fetch operation. Driving the low order address bits directly while the high order bits are latched during an address/data multiplex on the same pins allows the latch enable cycle to be skipped during sequential fetches. A sequential address detector indicates when the latch enable cycle can be skipped.
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申请公布号 |
US5594913(A) |
申请公布日期 |
1997.01.14 |
申请号 |
US19940308060 |
申请日期 |
1994.09.16 |
申请人 |
PHILIPS ELECTRONICS NORTH AMERICA CORPORATION |
发明人 |
OSTLER, FARRELL L.;GOODHUE, GREGORY K.;MIZRAHI-SHALOM, ORI K. |
分类号 |
G06F9/32;G06F12/02;G06F13/16;G11C8/00;(IPC1-7):G06F12/00 |
主分类号 |
G06F9/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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