发明名称 Dynamic random access memory wherein timing of completion of data reading is advanced
摘要 A dynamic random access memory includes a capacitor in at least one memory cell each for storing one bit digital data as a terminal voltage, at least one bit line corresponding to at least one memory cell, a gate provided for each of the capacitors in the memory cells and which controls an electrical connection/disconnection between a terminal of the capacitor in the memory cell which stores the terminal voltage and the bit line corresponding to the memory cell, and at least one data bus line provided for at least one bit line. A current is continuously supplied to each of at least one of the data bus lines from a predetermined source through a predetermined resistor, and a reading voltage output unit provided for each of the bit lines, connects a current input terminal thereof with a data bus corresponding to the bit line, and changes a voltage of the data bus according to the voltage change on the bit line.
申请公布号 US5594681(A) 申请公布日期 1997.01.14
申请号 US19940310369 申请日期 1994.09.22
申请人 FUJITSU LIMITED 发明人 TAGUCHI, MASAO
分类号 G11C7/10;G11C11/4076;G11C11/4096;(IPC1-7):G11C7/00 主分类号 G11C7/10
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