发明名称 INSULATED-GATE SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
摘要 PURPOSE: To improve the breakdown voltage while suppressing punch through by forming concentration distribution transferring the absolute value of a differential coefficient to the depth of semiconductor substrate of the concentration of the impurity for forming the conductivity type of source and drain regions from an increase to decrease at one position that is shallower than a P-N junction. CONSTITUTION: The concentration gradient of the depth direction in the P-type impurity distribution of the source and drain regions S/D of a PMOS is not simply increased in the negative direction upon increasing of the depth from the upper surface of a substrate to a P-N junction, but at least once transferred to the reduction. Further, the transfer to the reduction is at a region having P-type impurity concentration of 1×10<17> cm<-3> or more. In order to obtain such a profile for the P-type impurity concentration of the source and drain regions S/D, P0 is implanted as the implantation of P-type ions of the third stage. The P0 implantation is conducted at an incident 0 deg. along the normal direction of the upper surface of a semiconductor substrate. The P-type ions to be implanted are set to the magnitude reaching the vicinity of the P-N junction.
申请公布号 JPH098294(A) 申请公布日期 1997.01.10
申请号 JP19950154834 申请日期 1995.06.21
申请人 MITSUBISHI ELECTRIC CORP 发明人 SAKAKIBARA KIYOHIKO
分类号 H01L21/8247;H01L21/265;H01L27/115;H01L29/78;H01L29/788;H01L29/792;(IPC1-7):H01L29/78;H01L21/824 主分类号 H01L21/8247
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