| 摘要 |
PURPOSE: To provide SOI substrate for integrating a control circuit element including a power element and an ultra-thin-film SOI element in one chip. CONSTITUTION: An insulation film 3 is buried partially to a first silicon substrate 1, the surface is flattened, and the substrate 1 is laminated to a second silicon substrate 4 where a low-concentration epitaxial layer 5 is formed. The SOT layer is extremely thinned to approximately 0.1μm by grinding and polishing and an insulation film 8 for separating elements is formed on an ultra-thin-film SOI layer 7, thus obtaining an SOI substrate for integrating a vertical-type power element and an ultra-thin-film SOI element.
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