| 摘要 |
PURPOSE: To provide a semiconductor device in which a leakage voltage is high in a standby state, leakage current is reduce, a threshold voltage is more reduced in an active state and a high-speed operation is enabled by a low power supply voltage. CONSTITUTION: In a CMOS circuit 100, a Vcc level is supplied to the substrate of a PMOS 101 and a Vss level is supplied to the substrate of an NMOS 103 in the standby state. Then, the condition of Vbs(PMOS)=Vbs(NMOS)=0V is established. In the active state, Veq1 and Veq2 are respectively supplied to the substrate of the PMOS 101 and the substrate of the NMOS 103 at a p-n joint part between the sources and substrates so that the conditions of -Vbs(PMOS)=Vcc-Veq1<≠build and Vps(NMOS)=Veq2-Vss<≠Build can be established, and the threshold voltage is reduced rather than that in the standby state. At such a time, the leakage current caused by forward bias loaded to the p-n joint part is extremely small and ignored.
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