| 摘要 |
<p>PURPOSE: To provide a data transfer device capable of preventing the lack of transfer data and simplifying the control of a buffer memory. CONSTITUTION: A buffer circuit 20 is provided with two data buffers 21, 22 having memory regions A, B, to C of every labels 1, 2, to N applied to various data transferred to the ground as buffer memory and a prescribed number of reference labels corresponding to continuous high-speed clock pulses. The types of the labels are based on the positions of the high-speed clock pulses of the reference labels. When data are inputted, the inputted data are written into one data buffer 21 (22) at the address corresponding to the data in the labels 1, 2, to N, and all the stored data are read and outputted from all memory regions of the other data buffer 22 (21).</p> |
