| 摘要 |
<p>The present invention includes a connector that mates to the software-controllable parallel port output connector on a host device, a passive logic unit, and, preferably, a host-executable software program. The connector provides four loop-back connections: the AUTOFEED and FAULT pins are looped-together, as are the STROBE and BUSY pins, the INITIALIZE and SELECT pins, and the SELECT IN and PRINTER ERROR pins. The eight pins for data line output signals are input to the passive logic, which logic logically "OR's" the data line signals. The logical-OR output signal is fed back to the ACKNOWLEDGE pin of the connector, and signal ground pins on the connector are connected to ground. During testing, the connector and passive logic unit are connected to the host output parallel port, which typically is a 1284-compliant or other Centronics parallel-compatible port. The host device executes the software program, causing combinations of "1's" and "0's" to be input to various pins in the host parallel port output connector. The resultant signal at the test connector ACKNOWLEDGE pin enables the host to determine integrity of the host output port signals and host output port connector. The software program can provide user-readable error messages in English on a monitor coupled to the host, advising technicians as to what pin or pins are open or shorted on the host parallel port connector. <IMAGE></p> |
