发明名称 Apparatus and method for computer network clock recovery and jitter attenuation
摘要 A unit for controlling the data output rate from a device which receives data within a range of input rates. The unit includes an indicator for indicating a level of fullness of the device, first and second clocks which operate at a first and second predetermined frequencies, an edge synchronizer for indicating whether a first pulse of the first clock and a second pulse of the second clock are phase aligned, and a switch. The switch receives output from the indicator and from the edge synchronizer, and switches between the first and second clocks in accordance with the level of fullness and provided that the first and second pulses are phase aligned.
申请公布号 US5592658(A) 申请公布日期 1997.01.07
申请号 US19940315179 申请日期 1994.09.29
申请人 NOVACOM TECHNOLOGIES LTD. 发明人 NOAM, AVISHAY
分类号 H04J3/06;H04L12/42;(IPC1-7):G06F1/10 主分类号 H04J3/06
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