Parallel frame synchronizer for detecting forward-ordered/reverse-ordered, inverted/non-inverted data

摘要

A high speed parallel frame synchronizer provides high speed frame synchronization functions utilizing parallel processing techniques implemented with commercially available components. Serial input data is demultiplexed to an N bit wide word at a rate of 1/N of the input clock frequency. A total of N parallel correlators are used to detect the frame synchronization pattern. Outputs of the correlators are arbitrated using a priority encoder which provides synchronization information to the frame synchronizer. One embodiment of this invention utilizes 4N correlators to simultaneously provide for synchronization of true/inverted and forward/reverse data generated by real-time or playback data sources.