发明名称 |
Tungsten stud process for stacked via applications |
摘要 |
A tungsten stud, stacked via process, has been developed, featuring smooth planar topographies at all metal levels. The desirable topography is obtained by allowing the tungsten stud to reside at the same level, or slightly above the level, of the top surface of the via hole insulator. This is achieved via an insulator etch back procedure, performed after metal stud formation.
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申请公布号 |
US5591673(A) |
申请公布日期 |
1997.01.07 |
申请号 |
US19950498356 |
申请日期 |
1995.07.05 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. |
发明人 |
CHAO, YING-CHEN;SHEN, CHIH-HENG;YAN, YI-DONG |
分类号 |
H01L21/311;H01L21/768;(IPC1-7):H01L21/283;H01L21/302 |
主分类号 |
H01L21/311 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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