发明名称 |
Integrated circuit BiMOS fabrication method |
摘要 |
The method for manufacturing an IC consists in covering a monocrystalline silicon substrate (1) with an oxide layer and delimiting two buried n type regions. The two regions are defined by a masking operation. Arsenic ions are then implanted in the substrate areas revealed by an etching operation (20). An annealing treatment is then applied to the substrate. A second masking operation covers the implanted areas which are associated with a NMOS component and a vertical PNP component. A high dose ion implantation is applied to the substrate in order to define N - and N+ regions. |
申请公布号 |
FR2736208(A1) |
申请公布日期 |
1997.01.03 |
申请号 |
FR19950007904 |
申请日期 |
1995.06.30 |
申请人 |
MOTOROLA SEMICONDUCTEURS SA |
发明人 |
FOERSTNER JUERGEN;COMBES MYRIAM;MARTY BLAVIER ARLETTE;HAUTEKIET GUY |
分类号 |
H01L21/74;H01L21/8249 |
主分类号 |
H01L21/74 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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