| 摘要 |
<p>A bit line selection decoder, particularly for electronic memories, comprising at least two bit lines, each of which can be selected by a respective switch, and a plurality of control lines that drive the switches. Its particularity resides in the fact that it comprises a decoder, in which the outputs drive the switches, and at least one first and one second bus of control lines that are arranged in input to the decoder and are adapted to address any one of the at least two bit lines. <IMAGE></p> |
