发明名称 |
Digital video data decoder and associated control procedure |
摘要 |
The digital video data decoder includes a synchronising pattern detecting and generating section (30), containing a large number of stored synchronising signals, and matching the stored synchronising data with the format of the input data. A sequence control section (40) is used to extract the input data from starting data and user data. A buffer section (70) stores the sequence control unit output, and a cyclical redundancy check section (50) determines whether or not there are errors in the input data so that compensation can be made as necessary. A direct memory accessing section (60) outputs all the data, including the compensating data, directly to the external system, without passing it through the CPU control section first.
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申请公布号 |
DE19626063(A1) |
申请公布日期 |
1997.01.02 |
申请号 |
DE19961026063 |
申请日期 |
1996.06.28 |
申请人 |
HYUNDAI ELECTRONICS INDUSTRIES CO., LTD., ICHON, KYOUNGKI, KR |
发明人 |
UM, IN-YONG, SONGNAM, KYOUNGGI, KR |
分类号 |
G11B20/10;G11B20/12;G11B20/18;G11B27/30;H04N5/85;H04N5/935;(IPC1-7):H04N5/93;H04N9/87 |
主分类号 |
G11B20/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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