| 摘要 |
A moving picture coding and decoding circuit which can cope with a plurality of algorithms to reduce the number of components and facilitate extension. A picture to be coded is inputted to a motion detection/prediction section, which outputs a predictive difference signal and a predictive signal. DCT processing and quantization are performed for the predictive difference signal by a conversion coding and decoding section, from which a conversion coefficient signal is outputted to an interface bus. The conversion coding and decoding section also executes dequantization and inverse DCT processing of the conversion coefficient, adds the predictive signal to the conversion coefficient and outputs a result of the picture coding to an image data bus. A programmable architecture as in a digital signal processor is applied to the conversion coding and decoding section. The conversion coefficient outputted from the conversion coding and decoding section is stored into a FIFO memory of a zigzag scan/entropy coding section and then undergoes coding in an entropy coding section. A bit stream thus coded is stored once into and then outputted as codes from another FIFO memory.
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