发明名称 |
Method for fabricating VDMOS transistor with improved breakdown characteristics |
摘要 |
The breakdown voltage of a VDMOS transistor is markedly increased without depressing other electrical characteristics of the device by tying the potential of a field-isolation diffusion, formed under the edge portion of a strip of field oxide separating a matrix of source cells from a drain diffusion, to the source potential of the transistor. This may be achieved by extending a body region of a peripheral source cell every given number of peripheral cells facing the strip of field-isolation structure until it intersects said field-isolation diffusion. By so connecting one peripheral source cell every given number of cells, the actual decrement of the overall channel width of the integrated transistor is negligible, thus leaving unaltered the electrical characteristics of the power transistor.
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申请公布号 |
US5589405(A) |
申请公布日期 |
1996.12.31 |
申请号 |
US19950403629 |
申请日期 |
1995.04.21 |
申请人 |
SGS-THOMSON MICROELECTRONICS, S.R.L. |
发明人 |
CONTIERO, CLAUDIO;GALBIATI, PAOLA;ZULLINO, LUCIA |
分类号 |
H01L21/765;H01L29/06;H01L29/40;H01L29/78;(IPC1-7):H01L49/00 |
主分类号 |
H01L21/765 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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