发明名称 |
Negative voltage generator with voltage limiting circuit |
摘要 |
The generator includes an oscillator (3) which generates a clock signal (OSC) applied to a phase generator (2). The four outputs from the generator (ABCD) are applied to a bank of series capacitors (1) which generate a negative voltage. The generator is provided with a limiting circuit (4) which receives the negative voltage on an input (5) and generates a logic signal (ON) function of the voltage value. The circuit includes a comparator and a capacitor bridge which compares the voltage value with a reference value.
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申请公布号 |
FR2735885(A1) |
申请公布日期 |
1996.12.27 |
申请号 |
FR19950007619 |
申请日期 |
1995.06.21 |
申请人 |
SGS THOMSON MICROELECTRONICS SA |
发明人 |
GUEDJ MARC;BRIGATI ALESSANDRO;AULAS MAXENCE;DEMANGE NICOLAS |
分类号 |
G05F1/56;G11C5/14;H02M3/07;(IPC1-7):G05F1/56 |
主分类号 |
G05F1/56 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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