发明名称 HYBRID FREQUENCY SYNTHESIZER
摘要 the first phase accumulator(20) accumulating the phase data K at every clock; the second phase accumulator(21) operating with a clock faster than the first phase accumulator(20) by N times; a 360o detecting part(22) detecting the point where the sum of the output of the two phase accumulators; and an initializing circuit(23) initializing the first and the second phase accumulator and controlling the output timing of the first phase accumulator(20).
申请公布号 KR960016812(B1) 申请公布日期 1996.12.21
申请号 KR19940031319 申请日期 1994.11.26
申请人 KOREA ELECTRONICS & TELECOMMUNICATION RESEARCH INSTITUTE 发明人 JUNG, YONG-JOO
分类号 H03B28/00;H03L7/18;(IPC1-7):H03L7/16 主分类号 H03B28/00
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