发明名称 METHOD AND CIRCUIT FOR OUTPUT CONTROL OF SEMICONDUCTOR MEMORY DEVICE
摘要 PROBLEM TO BE SOLVED: To obtain a stable data output by preventing the data output by a reactive address in a hyper page mode by delaying the control signal of a data-line interruption circuit by using an address transition delay signal. SOLUTION: When an ATD senses address transition, a barϕATS is generated. The barϕATS controls an I/O sense amplifier while a delay signal bar ATSD is output by a second delay circuit. On the other hand, a control signalϕCD based on a string-address strobe signal bar CAS reaches HIGH after a fixed time when the barϕATS is returned from LOW to HIGH. TheϕCD and the barϕATSD are arithmetically operated by an AND gate 30, and a delay control signalϕCDD is output, and added to a data-line interruption circuit 10. Accordingly, a nonconductive state is kept in the interruption circuit 10 until data by an effective address signal appear in a data line DO and a bar DO, and a stable data output is acquired.
申请公布号 JPH08335393(A) 申请公布日期 1996.12.17
申请号 JP19960129721 申请日期 1996.05.24
申请人 SAMSUNG ELECTRON CO LTD 发明人 CHIYOU HORETSU
分类号 G11C11/41;G06F12/02;G06F12/14;G11C7/10;G11C7/22;G11C11/401;G11C11/409;(IPC1-7):G11C11/41 主分类号 G11C11/41
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