发明名称 TWO-DIMENSIONAL DCT CIRCUIT
摘要 <p>PURPOSE: To reduce the sum total of frequencies of product sum operation and addition/subtraction and to avoid the introduction of the operation error by using two-dimensional butterfly operation and tensor product operation to change the integration order without decomposition of a matrix using one- dimensional DCT and collecting all of product sum operation to the last stage. CONSTITUTION: This circuit consists of a first stage A consisting of two-dimensional butterfly operation elements 1 to 16, a second stage B consisting of two-dimensional butterfly operation elements 17 to 20 and butterfly operation elements 21 to 36, and a third stage C consisting of first to ninth tensor product operation elements 37 to 45. At the time of realizing two-dimensional DCT, two-dimensional butterfly operation and tensor product operation are used to change the integration order without matrix decomposition using one-dimensional DCT, thereby collecting all of product sum operation to the last stage. Thus, the operation processing for double precision data as the multiplication result is minimized.</p>
申请公布号 JPH08335885(A) 申请公布日期 1996.12.17
申请号 JP19950139374 申请日期 1995.06.06
申请人 NEC CORP 发明人 KURODA ICHIRO
分类号 H04N19/60;G06F17/14;H03M7/30;H04N1/41;H04N19/625;(IPC1-7):H03M7/30;H04N7/30 主分类号 H04N19/60
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