| 摘要 |
PURPOSE: To attain quick re-synchronization even on the occurrence of an error in a frame synchronizing signal by using an internal element so as to stop the reception of an erroneous frame synchronizing signal and sending the count value of a self-running clock signal corresponding to the frame synchronizing signal. CONSTITUTION: A load signal generating means 1 uses a received frame synchronizing signal to activate an internal element for an input timing of a succeeding frame synchronizing signal. Then the received frame synchronizing signal is set as a load signal via the internal element. A bit location generating means 2 counts an input clock CK corresponding to a frame synchronizing signal when the load signal is received and a self-running input clock corresponding to the frame synchronizing signal and sends the count as bit location information in a frame. Thus, when an error takes place in the frame synchronizing signal, because the internal element is inactivated, the signal is not fed to the means 2, and correct bit location information is sent with the self-running clock signal, then the probability of continuing erroneous count is precluded. |
