Hierarchial clock distribution system and method

摘要

The system includes a clock driver, delay buffers provided in the sub-blocks respectively, electrical interconnect that directly connects the clock driver to the delay buffers, and balanced clock-tree distribution systems provided between the delay buffers and circuitry in the sub-blocks respectively. The delay buffers provide equal clock skews from the clock driver to the distribution systems respectively, in which the delay buffers have the same physical size, and comprise identical delay lines that are loaded by number of loading elements that equalize the clock skews respectively.