Hochgeschwindigkeitsgerät für Einzelauffang-flip-flop eines parallelen AD-Wandlers

摘要

There is disclosed a high-speed decoding apparatus for use in a flash-type analog-to-digital converter. The apparatus disclosed employs an OR gate (70) which follows an AND gate (53), which AND gate is conventionally employed in a comparator associated with such a converter. The OR gate functions to block any dynamic movement of the unknown input voltage from being transferred to the decode lines of the analog-to-digital converter. To further gain speed, autozeroed inverters (74, 75; 77, 78) are coupled to the output of the OR gate to further assure that the decoder lines are rapidly driven to therefore gain an extra advantage in high-speed operation of the converter employing the apparatus as described.