MULTIPLE ADDRESS SECURITY ARCHITECTURE

摘要

A secure repeater (20) implementing data packet masking includes a programmable and selective, on a per port basis, disrupt response responsive to any of several selectable qualifying conditions. A disrupt controller (70) receives signals indicating various characteristics of fields of a data packet, and other conditions. A register bank (76) includes a plurality of memories, one associated with each port and some of the conditions, assists the disrupt controller to determine the associated port's disrupt response to the data packet. Each memory stores a disrupt control code. When the disrupt control code for a particular port has a value indicating that the associated port is enabled, deassertion of a condition signal associated with that control code results in disruption of a data packet. A cell array (200) permits simple, efficient scaling and formation of integrated semiconductor structures to implement complex disrupt logic equations.