摘要 |
A sampled signal integrator is provided comprising: an amplifier; two pairs of capacitors, the first pair of capacitors being coupled between the input and output terminals of the amplifier in a conventional negative feedback configuration, and the second pair of capacitors being coupled to the input terminals of the amplifier by a first pair of switches and likewise being coupled to a Voltage source by a second pair of switches; the two pairs of switches being further cross-coupled or synchronized to accomplish double-rate integration; and a voltage bias coupled in shunt with each of the input terminals of the amplifier to thereby provide a common mode bias to the integrator. Likewise, in another embodiment of the invention, the output signals of a sampled signal integrator configured so as to accomplish double-rate integration may be modulated and decimated to reduce or remove DC or low frequency noise.
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