发明名称 METHOD AND EQUIPMENT FOR RECOVERING SIGN CLOCK FROM SIGNAL HAVING WIDE FREQUENCY POSSIBILITY
摘要 PROBLEM TO BE SOLVED: To obtain a device for recovering a code clock from a received signal having a wide frequency errors or offsets. SOLUTION: The intensity values of received sampling in-phase and quadrature phase signals are judged (210). The intensity values are summed and distributed (227) in accumulator registers 231, 233, 235, 237, 239, and the sum of 1st and 2nd signals is totalized over respective sampling time and substantially predicted burst length. A maximum/minimum value determination circuit 240 selects sampling time having a maximum or minimum sum and provides a recovered clock signal 270. Then a carrier is recovered (260), and a down sampler 250 down-samples the received in-phase and quadrature phase signals based on the recovered clock signal.
申请公布号 JPH08317009(A) 申请公布日期 1996.11.29
申请号 JP19960140777 申请日期 1996.05.10
申请人 MOTOROLA INC 发明人 EE KORUBETSUTO ESU KAARU;BURATSUDOREE BII BETSUKII;JIYON DABURIYU ARENSU
分类号 H04L27/38;H04L7/00;H04L7/02;H04L7/027;H04L27/00;H04L27/14;H04L27/22;H04L27/227 主分类号 H04L27/38
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