| 摘要 |
<p>PURPOSE: To reduce the clock jitter causing the inter-code interference by controlling a switch means or a sampling and holding circuit by the control signal outputted from a pattern detection means. CONSTITUTION: An input signal (a) is inputted to a switch circuit 11 and a pattern detection circuit 12. The pattern detection circuit 12 monitors the input signal (a) and outputs a control signal (b) at the time of detection of a prescribed pattern. The switch circuit 11 is turned on/off by the control signal (b); and when it is turned on, an extracted input signal a1 is inputted to a clock extraction circuit 13. This circuit 13 is an already existing circuit consisting of a tank circuit and a PLL circuit and outputs a clock (c) extracted from the input signal a1.</p> |
