发明名称 SEMICONDUCTOR DEVICE
摘要 <p>PURPOSE: To prevent the delay time from increasing by setting the number of memory blocks in a memory array sectioned into a plurality of memory blocks having a parity bit equal to a multiple of 3 thereby making uniform the number of bits constituting a memory block even if the organization of I/O bits of the memory array is switched. CONSTITUTION: In a semiconductor memory chip 10, a memory array is divided into six memory blocks 100 each of which is subdivided into eight memory mats. The chip 10 is divided by a multiple of 3, i.e., 6, and the number of I/O to be served by each memory block can be divided uniformly into 12, 6 and 3 bits, respectively, for each organization of×72,×36 and×18 bits added with a parity bit. A peripheral circuit 2000 is provided in the center of the chip 10 in order to prevent the signal propagation delay from increasing. With such constitution, a fast semiconductor memory of variable bit constitution having a parity bit can be obtained without increasing the wiring delay time.</p>
申请公布号 JPH08315578(A) 申请公布日期 1996.11.29
申请号 JP19950122119 申请日期 1995.05.22
申请人 HITACHI LTD 发明人 AKIYAMA NOBORU;NAMETAKE MASATAKE;OKUMA YOSHIYUKI;EMORI AKIHIKO;AKIOKA TAKASHI;MIYAOKA SHUICHI;NAKAZATO SHINJI;MITSUMOTO KINYA
分类号 G11C11/41;G11C5/00;(IPC1-7):G11C11/41 主分类号 G11C11/41
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