| 摘要 |
PURPOSE: To reduce an arithmetic error without adjustment by inputting outputs from an integrator and a hysteresis comparator for outputting a discriminated output, and outputting the mean value of both the outputs. CONSTITUTION: The integrator 1 inputs a dividend VA and a feedback signal V3 and executes addition and integration. The hysteresis comparator 2 inputs an output from the integrator 1 and outputs a discriminated result. A limitter 3 inputs the output from the comparator 2 and a divisor VB and outputs a feedback signal with amplitude proportional to the divisor VB to the integrator 1 as the feedback signal V3. A mean value circuit 4 inputs the output of the comparator 2 and outputs its mean value VC. By this way, even if a general used parts on market is used, the performance of <=0.1% arithmetic operation error is attained without adjustment. |
