| 摘要 |
A DAC (84) converts a sequence of digital codewords (12) into an approximately piecewise linear analog waveform (50, 106) that follows rising and falling edges (76, 78; 94, 96) between plateau levels (82; 98). The DAC (84) processes, in parallel, each bit of the codewords (12) to produce component waveforms (88) that are weighted according to their bits significance and summed together to produce the piecewise linear analog waveform (50, 106). Waveform shaping circuits (100) control the rise and fall times of each component waveform (88) so that the analog waveform's rising and falling edges settle to within a desired error bound (80) of a linear output ramp (56, 58) whose slope is a function of the difference between successive codewords (12) and the rise or fall times. The rise and fall times are preferably approximately the same. Limiting switches (102) control the plateau levels of the component waveforms (88) so that the analog waveform's plateaus settle to within the desired error bound (80) of the ideal values represented by the codewords (12). The linear region of the limiting switches (102) are expanded to maintain the linearity of the rising and falling edges established by the waveform shaping circuits (100). <IMAGE> |
