Schaltungsanordnung einer getakteten Halbleiterendstufe

摘要

The invention relates to a circuit arrangement of a clocked semiconductor final stage with a first control circuit which switches a first circuit component on the basis of a high signal of a pulse width factor at an input terminal and a second control circuit which switches a second circuit component on the basis of a low signal of the pulse width factor. The control circuits (12, 14) are to be logically linked together.